Exemplary embodiments disclosed herein pertain to digital memory used in digital electronic devices. More particularly, exemplary embodiments disclosed herein pertain to flash memory devices.
Computers use RAM to hold the program code and data during computation. Many types of RAM are volatile, which means that unlike some other forms of computer storage, such as disk storage and tape storage, they lose all data when the computer is powered down.
Non-Volatile Memory (NVM) is a type of computer memory which does not lose its information when power is turned off. NVM is used in computer systems, routers and other electronic devices to store settings which must survive a power cycle (like number of disks and memory configuration). One example is the magnetic core memory that was used in the 1950s and 1960s.
The many types of NVM under development are based on various technologies, such as carbon nanotube technology, magnetic RAM (MRAM) based on the magnetic tunnel effect, Ovonic PCM Memory based on phase-change technology, and FeRAM based on the ferroelectric effect. Today, most NVM is Flash memory based on Floating Gate technology, and is used primarily in cell phones, digital cameras and portable MP3 players.
Flash memory is non-volatile, which means that it does not need power to maintain the information stored in the chip. In addition, flash memory offers fast read access times (though not as fast as volatile DRAM memory used for main memory in PCs) and better shock resistance than hard disks. These characteristics explain the popularity of flash memory for applications such as storage on battery-powered devices.
The first flash memory products stored information in an array of floating gate transistors, called “cells”, each of which traditionally stored one bit of information. Newer flash memory devices, sometimes referred to as multi-level cell (MLC) devices, can store more than 1 bit per cell, by varying the number of electrons placed on the floating gate of a cell.
Typical computer memory endurance requirement is 10,000 to 1,000,000 program/erase cycles. In some memory devices, called EEPROM, each program operation programs one byte (8 bits) in parallel, and each erase operation erases one page (about 1024 bytes) in parallel. In other memory devices, such as Flash memories, the erase operation erases an entire sector, called “Erase Sector” or “Block”. An erase sector may contain typically 64 or 128 pages.
Another feature characteristic of Flash memories is that each program/erase cycle starts by erasing an entire erase sector, setting the value of all bits to “1”, and then programming to “0” the specific bits that need to carry that respective information.
Because of the particular characteristics of flash memory, it is best used with specifically designed file systems which spread writes over the media and deal with the long erase times of flash blocks. The basic concept behind flash file systems is: when the flash store is to be updated, the file system will write a new copy of the changed data over to a fresh block, remap the file pointers, then erase the old block later when it has time.
One limitation of flash memory is that although it can be read or programmed a byte or a word at a time in a random access fashion, it must be erased a “block” or “sector” at a time. Starting with a freshly erased block, any byte within that block can be programmed. However, once a byte has been programmed, it cannot be changed again until the entire block is erased. In other words, flash memory (specifically NOR flash) offers random-access read and programming operations, but cannot offer random-access rewrite or erase operations.
When compared to a hard disk drive, a further limitation is the fact that flash memory has a finite number of erase-write cycles (most commercially available EEPROM products are guaranteed to withstand 106 programming cycles), so that care has to be taken when moving hard-drive based applications to flash-memory based devices such as CompactFlash. This effect is partially offset by some chip firmware or file system drivers by counting the writes and dynamically remapping the blocks in order to spread the write operations between the sectors, or by write verification and remapping to spare sectors in case of write failure.
Generally, during the normal operation of flash memory devices, the various write sectors are cycled evenly so that one part of the flash memory device does not become more worn over time than another part. Thus, all of the write sectors wear at about the same rate with respect to cycle count.
Since blocks or sectors degrade and eventually fail with usage, it is common to provide “spare” blocks to replace those primary blocks that have failed. However, in the prior art, the determination of how many spare blocks to provide is much more of a guess than a science. As a result, flash memory designers tend to provide too many spares, increasing the cost of the flash memory devices.
Moreover, there are no standards and no published methods that suggest how to verify that a product with a given number of spare blocks indeed meets its long-life reliability target, having sufficient number of spare blocks with respect to its physical degradation modes, rate of bad block generation and spare block consumption.
These and other limitations of the prior art will become apparent to those of skill in the art upon a reading of the following descriptions and a study of the several figures of the drawing.